Position: PhD Candidate
Current Institution: UCLA
Abstract: Towards General Purpose Acceleration: Finding Structure in Irregularity
Hardware specialization is promising to satisfy the computation requirements from big data. Even though ASICs enable fast processing their limited applicability to a few workloads significantly hinders algorithm innovation. With my research I envision that single hardware can efficiently execute many challenging applications with minimal non-recurring-engineering and time-to-market cost for the novel algorithms. Dataflow architectures and CGRAs have recently come to prominence due to their general computation and memory program paradigms. However their efficiency on irregular programs is insufficient because irregularity disturbs the program structure that CGRAs are designed to exploit. Consider spatial structure: CGRAs use vectorization to exploit the spatial structure (e.g. repeated computation in space). However a branch may diverge some computations hindering vectorization. In my research I explore how to support irregularity in CGRAs. Our critical insight is that there exist structured” forms of irregularity that are specializable without disrupting the efficiency principles of CGRAs. Moreover these forms span important domains like machine learning databases graph and signal processing. We have identified three forms of structured irregularity: stream-join control alias-free indirection memory access and commutative dynamic parallelism. We expose these forms in the hardware-software interface and provide necessary hardware support. Besides broad applicability we find that flexibility can lead to performance gains: we can use algorithms optimized for a given input. My research can significantly influence the field: Firstly it will enable a systematic understanding of irregular accelerators: structured irregularity forms can classify the fundamental capabilities of ASICs. Besides this way of viewing the algorithm-architecture interaction can improve the portability of techniques across domains that share the same irregularity form. Finally structured forms may exist along other execution dimensions leading to new specialization opportunities. An accelerator designed with data-dependence as first-order primitives in the ISA has the potential to replace GPUs as the dominant compute offload accelerator.”
Bio:
Vidushi Dadu is a fourth-year PhD candidate at UCLA advised by Prof. Tony Nowatzki. She did her bachelor’s in electronics and communication engineering at the Indian Institute of Technology Roorkee. Her research is about rethinking the accelerator design with the goal of achieving general-purpose acceleration using reconfigurable architecture. Her previous research has been recognized with an IEEE Micro Top Picks and an Honorable Mention award.